Alvin R. Lebeck
Professor of Computer Science
Computer Systems Engineering with a focus on computer architecture, nano-scale systems, memory system, energy efficient computing, and multiprocessors.
Appointments and Affiliations
- Professor of Computer Science
- Professor in the Department of Electrical and Computer Engineering
- Office Location: D308 Lev Sci Res Ctr, Durham, NC 27708
- Office Phone: (919) 660-6551
- Email Address: email@example.com
- Ph.D. University of Wisconsin at Madison, 1995
- M.S. University of Wisconsin at Madison, 1991
- B.S. University of Wisconsin at Madison, 1989
Computer Systems Engineering with a focus on computer architecture, software systems, specialized architectures, probabilistic computing, memory system, energy efficient computing, and multiprocessors
- COMPSCI 590: Advanced Topics in Computer Science
- ECE 250D: Computer Architecture
- ECE 590: Advanced Topics in Electrical and Computer Engineering
- ECE 652: Advanced Computer Architecture II
- Zhang, X; Bashizade, R; LaBoda, C; Dwyer, C; Lebeck, AR, Architecting a stochastic computing unit with molecular optical devices, Proceedings International Symposium on Computer Architecture (2018), pp. 301-314 [10.1109/ISCA.2018.00034] [abs].
- Razeen, A; Meijer, A; Lebeck, AR; Pistol, V; Liu, DH; Cox, LP, SandTrap: Tracking information flows on demand with parallel permissions, Mobisys 2018 Proceedings of the 16th Acm International Conference on Mobile Systems, Applications, and Services (2018), pp. 230-242 [10.1145/3210240.3210321] [abs].
- LaBoda, CD; Lebeck, AR; Dwyer, CL, An Optically Modulated Self-Assembled Resonance Energy Transfer Pass Gate., Nano Letters, vol 17 no. 6 (2017), pp. 3775-3781 [10.1021/acs.nanolett.7b01112] [abs].
- Misra, PA; Chase, JS; Gehrke, J; Lebeck, AR, Enabling Lightweight Transactions with Precision Time, Operating Systems Review (Acm), vol 51 no. 2 (2017), pp. 779-794 [10.1145/3093315.3037722] [abs].
- LaBoda, C; Dwyer, C; Lebeck, AR, Exploiting Dark Fluorophore States to Implement Resonance Energy Transfer Pre-Charge Logic, Ieee Micro, vol 37 no. 4 (2017), pp. 52-62 [10.1109/MM.2017.3211112] [abs].