Andrew D. Hilton

Andrew Douglas Hilton

Assistant Professor of the Practice in the Department of Electrical and Computer Engineering

Appointments and Affiliations

  • Assistant Professor of the Practice in the Department of Electrical and Computer Engineering
  • Assistant Professor of the Practice in the Department of Computer Science
  • Associate Director of Graduate Studies

Contact Information

  • Office Location: PO Box 90291, Hudson 211, Durham, NC 27708
  • Office Phone: 660-5177
  • Email Address: adhilton@ee.duke.edu
  • Websites:

Education

  • Ph.D. University of Pennsylvania, 2010

Courses Taught

  • COMPSCI 391: Independent Study
  • COMPSCI 553: Compiler Construction
  • ECE 458: Engineering Software for Maintainability
  • ECE 496: Special Topics in Electrical and Computer Engineering
  • ECE 550D: Fundamentals of Computer Systems and Engineering
  • ECE 551D: Programming, Data Structures, and Algorithms in C++
  • ECE 553: Compiler Construction
  • ECE 891: Internship
  • ECE 899: Special Readings in Electrical Engineering

In the News

Representative Publications

  • Huang, Z; Hilton, AD; Lee, BC, Decoupling Loads for Nano-Instruction Set Computers, Proceedings - 2016 43rd International Symposium on Computer Architecture, ISCA 2016 (2016), pp. 406-417 [10.1109/ISCA.2016.43] [abs].
  • Jacobvitz, AN; Hilton, AD; Sorin, DJ, Multi-program benchmark definition, ISPASS 2015 - IEEE International Symposium on Performance Analysis of Systems and Software (2015), pp. 72-82 [10.1109/ISPASS.2015.7095786] [abs].
  • Battle, S; Hilton, AD; Hempstead, M; Roth, A, Flexible register management using reference counting, Proceedings - International Symposium on High-Performance Computer Architecture (2012), pp. 273-284 [10.1109/HPCA.2012.6169033] [abs].
  • Hilton, A; Nagarakatte, S; Roth, A, ICFP: Tolerating all-level cache misses in in-order processors, IEEE Micro, vol 30 no. 1 (2010), pp. 12-19 [10.1109/MM.2010.20] [abs].
  • Hilton, A; Roth, A, SMT-directory: Efficient load-load ordering for SMT, IEEE Computer Architecture Letters, vol 9 no. 1 (2010), pp. 25-28 [10.1109/L-CA.2010.8] [abs].