ECE Seminar: Dealing with Complexity in Verification and Test of Integrated Circuits
Friday, April 4, 2014
3:00 pm - 4:00 pm
Hudson Hall 115A
Jacob A. Abraham, Ph.D., University of Texas at Austin
Advances in semiconductor technology have enabled the integration of many digital cores along with mixed-signal and RF modules on a single system-on-chip (SoC). This offers many benefits in cost and performance, but poses significant challenges for verifying the correctness of the design and for testing manufactured chips for defects. Verification of the design has to deal with enormous state spaces. Tests for defects in nanometer scale technologies have to detect small delay variations, as well as deal with embedded analog and RF modules. This talk will describe techniques for dealing with these problems, including abstractions based on static analysis of the design description, exploiting the hierarchy in the design, reducing the search space using approximations, and using on-chip circuitry to facilitate test of embedded modules. Jacob A. Abraham is Professor of Electrical and Computer Engineering and Professor of Computer Sciences at the University of Texas at Austin. He is also the director of the Computer Engineering Research Center and holds a Cockrell Family Regents Chair in Engineering. He received his Ph.D. in Electrical Engineering and Computer Science from Stanford University in 1974. His research interests include VLSI design, verification, test, fault tolerance and security.