Hai "Helen" Li

Research Themes

Artificial Intelligence & Machine Learning, Hardware & Software, Trustworthy Computing

Education

• Ph.D. Purdue University, 2004

Positions

• Professor in the Department of Electrical and Computer Engineering
• Marie Foote Reel E'46 Distinguished Professor of Electrical and Computer Engineering
• Chair of the Department of Electrical and Computer Engineering
• Professor of Computer Science

Awards, Honors, and Distinctions

• Fellow, Executive Leadership in Academic Technology, Engineering and Science (ELATES). Drexel University. 2022
• Distinguished Member. Association for Computing Machinery (ACM). 2018
• Fellow. Institute of Electrical and Electronics Engineers (IEEE). 2018
• Best Paper Award for the paper titled u201cClassification Accuracy Improvement for Neuromorphic Computing Systems with One-level Precision Synapsesu201d. Asia and South Pacific Design Automation Conference (ASPDAC). 2017
• Fulton C. Noss Faculty Fellow. University of Pittsburgh. 2016
• Best Paper Award for the paper titled u201cQuantitative Modeling of Racetrack Memory - A Tradeoff among Area, Performance, and Poweru201d. Asia and South Pacific Design Automation Conference (ASPDAC). 2015
• Air Force Summer Faculty Fellowship Program Award (AF-SFFP). AFRL/RITC. 2015
• Best Paper Award for the paper titled u201cA Weighted Sensing Scheme for ReRAM-based Cross-point Memory Arrayu201d. IEEE Computer Society Annual Symposium on VLSI (ISVLSI). 2014
• Best Paper Award for the paper titled u201cCoordinating Prefetching and STT-RAM based Last-level Cache Management for Multicore Systemsu201d. Proceedings of the 23rd ACM International Conference on Great Lakes Symposium on VLSI (GLSVLSI). 2013
• Air Force Visiting Faculty Research Program (VFRP) Fellowship. AFRL/RIB. 2013
• DARPA Young Faculty Award. Defense Advanced Research Projects Agency (DARPA). 2013
• NSF Career Award. National Science Foundation (NSF). 2012
• Air Force Summer Faculty Fellowship Program Award (AF-SFFP). AFRL/RITC. 2011
• Best Paper Award for the paper titled u201cCombined Magnetic- and Circuit-level Enhancements for the Nondestructive Self-Reference Scheme of STT-RAMu201d. ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED). 2010
• Best Paper Award for the paper titled u201cDesign Margin Exploration of Spin-Torque Transfer RAM (SPRAM)u201d. the 9th International Symposium on Quality Electronic Design (ISQED). 2008

Courses Taught

• ECE 891: Internship
• ECE 661: Computer Engineering Machine Learning and Deep Neural Nets
• ECE 550D: Fundamentals of Computer Systems and Engineering
• ECE 494: Projects in Electrical and Computer Engineering
• ECE 493: Projects in Electrical and Computer Engineering

Publications

• De V, Li H. Recap of the 61st ACM/IEEE Design Automation Conference (DAC61): The “Chips to Systems Conference” (Accepted). IEEE Design & Test. 2024 Dec;41(6):95–6.
• Li Z, Zheng Q, Ku J, Taylor B, Li H. TFSRAM: A 249.8TOPS/W Timing-to-First-Spike Compute-in-Memory Neuromorphic Processing Engine With Twin-Column SRAM Synapses. IEEE Transactions on Circuits and Systems for Artificial Intelligence. 2024 Sep;1(1):26–36.
• Kim B, Li H, Chen Y. Processing-in-Memory Designs Based on Emerging Technology for Efficient Machine Learning Acceleration. In: Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI. 2024. p. 614–9.
• Krestinskaya O, Fouda ME, Benmeziane H, El Maghraoui K, Sebastian A, Lu WD, et al. Neural architecture search for in-memory computing-based deep learning accelerators. Nature Reviews Electrical Engineering. 2024 May 20;1(6):374–90.
• Li S, Wang Y, Hanson E, Chang A, Seok Ki Y, Li H, et al. NDRec: A Near-Data Processing System for Training Large-Scale Recommendation Models. IEEE Transactions on Computers. 2024 May 1;73(5):1248–61.
• Wang B, Lin M, Zhou T, Zhou P, Li A, Pang M, et al. Efficient, Direct, and Restricted Black-Box Graph Evasion Attacks to Any-Layer Graph Neural Networks via Influence Function. In: WSDM 2024 - Proceedings of the 17th ACM International Conference on Web Search and Data Mining. 2024. p. 693–701.
• Yang X, Wang Z, Hu XS, Kim CH, Yu S, Pajic M, et al. Neuro-Symbolic Computing: Advancements and Challenges in Hardware-Software Co-Design. IEEE Transactions on Circuits and Systems II: Express Briefs. 2024 Mar 1;71(3):1683–9.
• Wu X, Hanson E, Wang N, Zheng Q, Yang X, Yang H, et al. Block-Wise Mixed-Precision Quantization: Enabling High Efficiency for Practical ReRAM-based DNN Accelerators. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 2024 Jan 1;
• Wang Y, Li S, Zheng Q, Song L, Li Z, Chang A, et al. NDSEARCH: Accelerating Graph-Traversal-Based Approximate Nearest Neighbor Search through Near Data Processing. In: Proceedings - International Symposium on Computer Architecture. 2024. p. 368–81.
• Zheng Q, Li S, Wang Y, Li Z, Chen Y, Li HL. Hybrid Digital/Analog Memristor-based Computing Architecture for Sparse Deep Learning Acceleration. In: Proceedings - IEEE International Symposium on Circuits and Systems. 2024.
• Parhi KK, Li H, Kailas K, Krishnaswamy H, Alioto M, Ogorzalek M. Editorial: Special Issue for the 75th Anniversary of the IEEE Circuits and Systems Society [Editorial]. IEEE Circuits and Systems Magazine. 2024 Jan 1;24(2):3.
• Li HH. Guest Editorial Special Issue on the International Symposium on Integrated Circuits and Systems'ISICAS 2023. IEEE Transactions on Circuits and Systems I: Regular Papers. 2023 Dec 1;70(12):4678–4678.
• Kim B, Li H. Monolithic 3D stacking for neural network acceleration. Nature Electronics. 2023 Dec 1;6(12):937–8.
• Zhao W, Li HH, Zito D. Outgoing Editorial. IEEE Transactions on Circuits and Systems I: Regular Papers. 2023 Dec 1;70(12):4675–7.
• Hanson E, Li S, Zhou G, Cheng F, Wang Y, Bose R, et al. Si-Kintsugi: Towards Recovering Golden-Like Performance of Defective Many-Core Spatial Architectures for AI. In: Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2023. 2023. p. 972–85.
• Wang Y, Li S, Zheng Q, Chang A, Li H, Chen Y. EMS-i: An Efficient Memory System Design with Specialized Caching Mechanism for Recommendation Inference. ACM Transactions on Embedded Computing Systems. 2023 Sep 9;22(5 s).
• Li H, Taylor B. A Hardware and Software Co-design Framework for Energy Efficient Neuromorphic Systems. Office of Scientific and Technical Information (OSTI); 2023 Jul.
• Yang X, Yang H, Doppa JR, Pande PP, Chakrabartys K, Li H. ESSENCE: Exploiting Structured Stochastic Gradient Pruning for Endurance-Aware ReRAM-Based In-Memory Training Systems. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 2023 Jul 1;42(7):2187–99.
• Li Z, Zheng Q, Chen Y, Li H. SpikeSen: Low-Latency In-Sensor-Intelligence Design With Neuromorphic Spiking Neurons. IEEE Transactions on Circuits and Systems II: Express Briefs. 2023 Jun 1;70(6):1876–80.
• Zhang T, Cheng D, He Y, Chen Z, Dai X, Xiong L, et al. NASRec: Weight Sharing Neural Architecture Search for Recommender Systems. In: ACM Web Conference 2023 - Proceedings of the World Wide Web Conference, WWW 2023. 2023. p. 1199–207.
• Joardar BK, Doppa JR, Li H, Chakrabarty K, Pande PP. ReaLPrune: ReRAM Crossbar-Aware Lottery Ticket Pruning for CNNs. IEEE Transactions on Emerging Topics in Computing. 2023 Apr 1;11(2):303–17.
• Hanson E, Horton M, Li HH, Chen Y. DefT: Boosting Scalability of Deformable Convolution Operations on GPUs. In: International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS. 2023. p. 134–46.
• Hanson E, Li S, Qian X, Li HH, Chen Y. DyNNamic: Dynamically Reshaping, High Data-Reuse Accelerator for Compact DNNs. IEEE Transactions on Computers. 2023 Mar 1;72(3):880–92.
• Augustine C, Li H. ISLPED 2022: An Experience of a Hybrid Conference in the Time of COVID-19. IEEE Design and Test. 2023 Feb 1;40(1):105–7.
• Zheng Q, Li S, Wang Y, Li Z, Chen Y, Li HH. Accelerating Sparse Attention with a Reconfigurable Non-volatile Processing-In-Memory Architecture. In: Proceedings - Design Automation Conference. 2023.
• Song L, Chen F, Li H, Chen Y. Refloat: Low-Cost Floating-Point Processing in ReRAM for Accelerating Iterative Linear Solvers. In: International Conference for High Performance Computing, Networking, Storage and Analysis, SC. 2023.
• Zhang T, Ma M, Yan F, Li H, Chen Y. : Joint Point Interaction-Dimension Search for 3D Point Cloud. In: Proceedings - 2023 IEEE Winter Conference on Applications of Computer Vision, WACV 2023. 2023. p. 1298–307.
• Zhang J, Inkawhich N, Linderman R, Chen Y, Li H. Mixture Outlier Exposure: Towards Out-of-Distribution Detection in Fine-grained Environments. In: Proceedings - 2023 IEEE Winter Conference on Applications of Computer Vision, WACV 2023. 2023. p. 5520–9.
• Kim B, Li S, Li H. INCA: Input-stationary Dataflow at Outside-the-box Thinking about Deep Learning Accelerators. In: Proceedings - International Symposium on High-Performance Computer Architecture. 2023. p. 29–41.
• Li HH. MWSCAS Guest Editorial Special Issue Based on the 64th International Midwest Symposium on Circuits and Systems. IEEE Transactions on Circuits and Systems I: Regular Papers. 2023 Jan 1;70(1):1–2.
• Yang H, Yin H, Shen M, Molchanov P, Li H, Kautz J. Global Vision Transformer Pruning with Hessian-Aware Saliency. In: Proceedings of the IEEE Computer Society Conference on Computer Vision and Pattern Recognition. 2023. p. 18547–57.
• Tung CH, Joardar BK, Pande PP, Doppa JR, Li HH, Chakrabarty K. Dynamic Task Remapping for Reliable CNN Training on ReRAM Crossbars. In: Proceedings -Design, Automation and Test in Europe, DATE. 2023.
• Qiao X, Li H. On a New Type of Neural Computation for Probabilistic Symbolic Reasoning. In: Proceedings of the International Joint Conference on Neural Networks. 2023.
• Shafique M, Theocharides T, Li H, Jason Xue C. Introduction to the Special Issue on Accelerating AI on the Edge - Part 2. ACM Transactions on Embedded Computing Systems. 2022 Dec 12;21(6).
• Du Z, Sun J, Li A, Chen PY, Zhang J, Li H, et al. Rethinking normalization methods in federated learning. In: DistributedML 2022 - Proceedings of the 3rd International Workshop on Distributed Machine Learning, Part of CoNEXT 2022. 2022. p. 16–22.
• Li HH. Guest Editorial Special Issue on the International Symposium on Integrated Circuits and Systems - ISICAS 2022. IEEE Transactions on Circuits and Systems I: Regular Papers. 2022 Dec 1;69(12):4730.
• Hu S, Yu S, Li H, Piuri V. Guest Editorial Special Issue on Security, Privacy, and Trustworthiness in Intelligent Cyber-Physical Systems and Internet of Things. IEEE Internet of Things Journal. 2022 Nov 15;9(22):22044–7.
• Sun J, Li A, Duan L, Alam S, Deng X, Guo X, et al. FedSEA: A Semi-Asynchronous Federated Learning Framework for Extremely Heterogeneous Devices. In: SenSys 2022 - Proceedings of the 20th ACM Conference on Embedded Networked Sensor Systems. 2022. p. 106–19.
• Ogbogu C, Arka AI, Joardar BK, Doppa JR, Li H, Chakrabarty K, et al. Accelerating Large-Scale Graph Neural Network Training on Crossbar Diet. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 2022 Nov 1;41(11):3626–37.
• Henkel J, Li H, Raghunathan A, Tahoori MB, Venkataramani S, Yang X, et al. Approximate computing and the efficient machine learning expedition. In: IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD. 2022.
• Hanson E, Li S, Li HH, Chen Y. Cascading Structured Pruning: Enabling High Data Reuse for Sparse DNN Accelerators. In: Proceedings - International Symposium on Computer Architecture. 2022. p. 522–35.
• Mao J, Yang Q, Li A, Nixon KW, Li H, Chen Y. Toward Efficient and Adaptive Design of Video Detection System with Deep Neural Networks. ACM Transactions on Embedded Computing Systems. 2022 May 1;21(3).
• Li HH, Alameldeen AR, Mutlu O. Guest Editors' Introduction: Near-Memory and In-Memory Processing. IEEE Design and Test. 2022 Apr 1;39(2):46–7.
• Chen Y, Li HH. SMALE: Enhancing Scalability of Machine Learning Algorithms on Extreme-Scale Computing Platforms. Office of Scientific and Technical Information (OSTI); 2022 Feb.
• Yang X, Yang H, Zhang J, Li HH, Chen Y. On Building Efficient and Robust Neural Network Designs. In: Conference Record - Asilomar Conference on Signals, Systems and Computers. 2022. p. 317–21.
• Zhang GL, Zhang S, Li HH, Schlichtmann U. RRAM-based Neuromorphic Computing: Data Representation, Architecture, Logic, and Programming. In: Proceedings - 2022 25th Euromicro Conference on Digital System Design, DSD 2022. 2022. p. 423–8.
• Inkawhich M, Inkawhich N, Davis E, Li H, Chen Y. The Untapped Potential of Off-the-Shelf Convolutional Neural Networks. In: Proceedings - 2022 IEEE/CVF Winter Conference on Applications of Computer Vision, WACV 2022. 2022. p. 2907–16.
• Zhang J, Du Z, Sun J, Li A, Tang M, Wu Y, et al. Next Generation Federated Learning for Edge Devices: An Overview. In: Proceedings - 2022 IEEE 8th International Conference on Collaboration and Internet Computing, CIC 2022. 2022. p. 10–5.
• Zhang J, Chen Y, Li H. Privacy Leakage of Adversarial Training Models in Federated Learning Systems. In: IEEE Computer Society Conference on Computer Vision and Pattern Recognition Workshops. 2022. p. 107–13.
• Yeats E, Liu F, Womble D, Li H. NashAE: Disentangling Representations Through Adversarial Covariance Minimization. In 2022. p. 36–51.
• Feng G, Kim B, Li HH. Bionic Robust Memristor-Based Artificial Nociception System for Robotics. In: Proceedings - IEEE International Symposium on Circuits and Systems. 2022. p. 3552–6.
• Tang M, Ning X, Wang Y, Sun J, Li H, Chen Y. FedCor: Correlation-Based Active Client Selection Strategy for Heterogeneous Federated Learning. In: Proceedings of the IEEE Computer Society Conference on Computer Vision and Pattern Recognition. 2022. p. 10092–101.
• Taylor B, Ramos N, Yeats E, Li H. CMOS Implementation of Spiking Equilibrium Propagation for Real-Time Learning. In: Proceeding - IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2022. 2022. p. 283–6.
• Fang H, Taylor B, Li Z, Mei Z, Li HH, Qiu Q. Neuromorphic Algorithm-hardware Codesign for Temporal Pattern Learning. In: Proceedings - Design Automation Conference. 2021. p. 361–6.
• Joardar BK, Doppa JR, Li H, Chakrabarty K, Pande PP. Learning to Train CNNs on Faulty ReRAM-based Manycore Accelerators. ACM Transactions on Embedded Computing Systems. 2021 Oct 31;20(5s):1–23.
• Li S, Hanson E, Qian X, Li HH, Chen Y. ESCALATE: Boosting the efficiency of sparse CNN accelerator with kernel decomposition. In: Proceedings of the Annual International Symposium on Microarchitecture, MICRO. 2021. p. 992–1004.
• Yang Q, Mao J, Wang Z, Hai L. Dynamic Regularization on Activation Sparsity for Neural Network Efficiency Improvement. ACM Journal on Emerging Technologies in Computing Systems. 2021 Oct 1;17(4).
• Wang B, Guo J, Li A, Chen Y, Li H. Privacy-Preserving Representation Learning on Graphs: A Mutual Information Perspective. In: Proceedings of the ACM SIGKDD International Conference on Knowledge Discovery and Data Mining. 2021. p. 1667–76.
• Wang T, Koch P, Wujek B, Liu J, Li H. The Fifth International Workshop on Automation in Machine Learning. In: Proceedings of the 27th ACM SIGKDD Conference on Knowledge Discovery & Data Mining. ACM; 2021. p. 4163–4.
• Yang C, Ding L, Chen Y, Li H. Defending against GAN-based DeepFake Attacks via Transformation-aware Adversarial Faces. In: Proceedings of the International Joint Conference on Neural Networks. 2021.
• Mao J, Yang H, Li A, Li H, Chen Y. TPrune: Efficient Transformer Pruning for Mobile Devices. ACM Transactions on Cyber-Physical Systems. 2021 Jul 1;5(3).
• Zhang J, Huang Y, Yang H, Martinez M, Hickman G, Krolik J, et al. Efficient FPGA Implementation of a Convolutional Neural Network for Radar Signal Processing. In: 2021 IEEE 3rd International Conference on Artificial Intelligence Circuits and Systems, AICAS 2021. 2021.
• Hu W, Chang CH, Sengupta A, Bhunia S, Kastner R, Li H. An Overview of Hardware Security and Trust: Threats, Countermeasures, and Design Tools. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 2021 Jun 1;40(6):1010–38.
• Kim B, Hanson E, Li H. An Efficient 3D ReRAM Convolution Processor Design for Binarized Weight Networks. IEEE Transactions on Circuits and Systems II: Express Briefs. 2021 May 1;68(5):1600–4.
• Joardar BK, Doppa JR, Pande PP, Li H, Chakrabarty K. AccuReD: High Accuracy Training of CNNs on ReRAM/GPU Heterogeneous 3-D Architecture. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 2021 May 1;40(5):971–84.
• Yang Q, Li H. BitSystolic: A 26.7 TOPS/W 2b8b NPU with Configurable Data Flows for Edge Devices. IEEE Transactions on Circuits and Systems I: Regular Papers. 2021 Mar 1;68(3):1134–45.
• Zhang GL, Li B, Huang X, Shen C, Zhang S, Burcea F, et al. An Efficient Programming Framework for Memristor-based Neuromorphic Computing. In: Proceedings -Design, Automation and Test in Europe, DATE. 2021. p. 1068–73.
• Ma W, Xie G, Li R, Liu W, Li HH, Chang W. Efficient AUTOSAR-Compliant CAN-FD Frame Packing with Observed Optimality. In: Proceedings -Design, Automation and Test in Europe, DATE. 2021. p. 1899–904.
• Chen F, Song L, Li HH, Chen Y. RAISE: A Resistive Accelerator for Subject-Independent EEG Signal Classification. In: Proceedings -Design, Automation and Test in Europe, DATE. 2021. p. 340–3.
• Chen F, Song L, Li H, Chen Y. Marvel: A Vertical Resistive Accelerator for Low-Power Deep Learning Inference in Monolithic 3D. In: Proceedings -Design, Automation and Test in Europe, DATE. 2021. p. 1240–5.
• Liang F, Tian Z, Dong M, Cheng S, Sun L, Li H, et al. Efficient neural network using pointwise convolution kernels with linear phase constraint. Neurocomputing. 2021 Jan 29;423:572–9.
• Zhang S, Li HH, Schlichtmann U. Connection-based Processing-In-Memory Engine Design Based on Resistive Crossbars. In: Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. 2021. p. 107–13.
• Wang Y, Zhu Z, Chen F, Ma M, Dai G, Li H, et al. REREC: In-ReRAM Acceleration with Access-Aware Mapping for Personalized Recommendation. In: IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD. 2021.
• Yang X, Belakaria S, Joardar BK, Yang H, Doppa JR, Pande PP, et al. Multi-Objective Optimization of ReRAM Crossbars for Robust DNN Inferencing under Stochastic Noise. In: IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD. 2021.
• Zhang S, Li H, Schlichtmann U. Peripheral Circuitry Assisted Mapping Framework for Resistive Logic-In-Memory Computing. In: IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD. 2021.
• Sun J, Li A, Wang B, Yang H, Li H, Chen Y. Soteria: Provable Defense against Privacy Leakage in Federated Learning from Representation Perspective. In: Proceedings of the IEEE Computer Society Conference on Computer Vision and Pattern Recognition. 2021. p. 9307–15.
• Zhang Q, Wang B, Wen W, Li H, Liu J. Line Art Correlation Matching Feature Transfer Network for Automatic Animation Colorization. In: 2021 IEEE Winter Conference on Applications of Computer Vision (WACV). IEEE; 2021. p. 3871–80.
• Yeats E, Chen Y, Li H. Improving Gradient Regularization using Complex-Valued Neural Networks. In: Proceedings of Machine Learning Research. 2021. p. 11953–63.
• Li A, Sun J, Wang B, Duan L, Li S, Chen Y, et al. LotteryFL: Empower Edge Intelligence with Personalized and Communication-Efficient Federated Learning. In: 6th ACM/IEEE Symposium on Edge Computing, SEC 2021. 2021. p. 68–79.
• Sun J, Li A, DiValentin L, Hassanzadeh A, Chen Y, Li H. FL-WBC: Enhancing Robustness against Model Poisoning Attacks in Federated Learning from a Client Perspective. In: Advances in Neural Information Processing Systems. 2021. p. 12613–24.
• Joardar BK, Arka AI, Doppa JR, Pande PP, Li H, Chakrabarty K. Heterogeneous Manycore Architectures Enabled by Processing-in-Memory for Deep Learning: From CNNs to GNNs. In: IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD. 2021.
• Li HH. Brain Inspired Computing: The Extraordinary Voyages in Known and Unknown Worlds. In: 2021 IEEE INTERNATIONAL SYMPOSIUM ON SMART ELECTRONIC SYSTEMS (ISES 2021). 2021. p. XXXI–XXXII.
• Taylor B, Shrestha A, Qiu Q, Li H. 1S1R-based stable learning through single-spike-encoded spike-timing-dependent plasticity. In: Proceedings - IEEE International Symposium on Circuits and Systems. 2021.
• Cheng HP, Zhang T, Zhang Y, Li S, Liang F, Yan F, et al. NASGEM: Neural Architecture Search via Graph Embedding Method. In: 35th AAAI Conference on Artificial Intelligence, AAAI 2021. 2021. p. 7090–8.
• Liu X, Mao M, Bi X, Li H, Chen Y. Exploring Applications of STT-RAM in GPU Architectures. IEEE Transactions on Circuits and Systems I: Regular Papers. 2021 Jan 1;68(1):238–49.
• Chen Y, Li A, Yang H, Zhang T, Yang Y, Li H, et al. AI-Powered IoT System at the Edge. In: Proceedings - 2021 IEEE 3rd International Conference on Cognitive Machine Intelligence, CogMI 2021. 2021. p. 242–51.
• Serrano-Gotarredona T, Valle M, Conti F, Li H. Introduction to the Special Issue on the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS 2020). IEEE Journal on Emerging and Selected Topics in Circuits and Systems. 2020 Dec 1;10(4):403–5.
• Li Z, Li B, Fan Z, Li H. RED: A ReRAM-Based Efficient Accelerator for Deconvolutional Computation. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 2020 Dec 1;39(12):4736–47.
• Lan Y, Nixon KW, Guo Q, Zhang G, Xu Y, Li H, et al. FCDM: A Methodology Based on Sensor Pattern Noise Fingerprinting for Fast Confidence Detection to Adversarial Attacks. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 2020 Dec 1;39(12):4791–804.
• Kurshan E, Li H, Seok M, Xie Y. A Case for 3D Integrated System Design for Neuromorphic Computing and AI Applications. International Journal of Semantic Computing. 2020 Dec 1;14(4):457–75.
• Xie Z, Li H, Xu X, Hu J, Chen Y. Fast IR Drop Estimation with Machine Learning : Invited Paper. In: IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD. 2020.
• Zheng Q, Li X, Wang Z, Sun G, Cai Y, Huang R, et al. MobiLattice: A Depth-wise DCNN Accelerator with Hybrid Digital/Analog Nonvolatile Processing-In-Memory Block. In: IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD. 2020.
• Yang X, Yan B, Li H, Chen Y. ReTransformer: ReRAM-based Processing-in-Memory Architecture for Transformer Acceleration. In: IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD. 2020.
• Yang C, Liu B, Li H, Chen Y, Barnell M, Wu Q, et al. Thwarting Replication Attack against Memristor-Based Neuromorphic Computing System. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 2020 Oct 1;39(10):2192–205.
• Wen W, Yan F, Chen Y, Li H. AutoGrow: Automatic Layer Growing in Deep Convolutional Networks. In: Proceedings of the ACM SIGKDD International Conference on Knowledge Discovery and Data Mining. 2020. p. 833–41.
• Zhang S, Zhang GL, Li B, Li HH, Schlichtmann U. Lifetime Enhancement for RRAM-based Computing-In-Memory Engine Considering Aging and Thermal Effects. In: Proceedings - 2020 IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2020. 2020. p. 11–5.
• Zheng Q, Wang Z, Feng Z, Yan B, Cai Y, Huang R, et al. Lattice: An ADC/DAC-less ReRAM-based processing-in-memory architecture for accelerating deep convolution neural networks. In: Proceedings - Design Automation Conference. 2020.
• Li Z, Yan B, Li HH. ReSiPE: ReRAM-based single-spiking processing-in-memory engine. In: Proceedings - Design Automation Conference. 2020.
• Kim B, Li H. Leveraging 3D vertical RRAM to developing neuromorphic architecture for pattern classification. In: Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI. 2020. p. 258–63.
• Wu C, Li H. Conditional Transferring Features: Scaling GANs to Thousands of Classes with 30% Less High-Quality Data for Training. In: Proceedings of the International Joint Conference on Neural Networks. 2020.
• Wu C, Ni B, Li H. Redistributing and Re-Stylizing Features for Training a Fast Photorealistic Stylizer. In: Proceedings of the International Joint Conference on Neural Networks. 2020.
• Song C, Cheng HP, Yang H, Li S, Wu C, Wu Q, et al. Adversarial Attack: A New Threat to Smart Devices and How to Defend It. IEEE Consumer Electronics Magazine. 2020 Jul 1;9(4):49–55.
• Yang H, Tang M, Wen W, Yan F, Hu D, Li A, et al. Learning low-rank deep neural networks via singular vector orthogonality regularization and singular value sparsification. In: IEEE Computer Society Conference on Computer Vision and Pattern Recognition Workshops. 2020. p. 2899–908.
• Zhang J, Huang J, Deisher M, Li H, Chen Y. Structural sparsification for far-field speaker recognition with intel R GNA. In: ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings. 2020. p. 3037–41.
• Zhang G, Li B, Wu J, Wang R, Lan Y, Sun L, et al. A low-cost and high-speed hardware implementation of spiking neural network. Neurocomputing. 2020 Mar 21;382:106–15.
• Joardar BK, Kannappan Jayakodi N, Doppa JR, Li H, Pande PP, Chakrabarty K. GRAMARCH: A GPU-ReRAM based Heterogeneous Architecture for Neural Image Segmentation. In: Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020. 2020. p. 228–33.
• Wang Y, Chen F, Song L, Richard Shi CJ, Li HH, Chen Y. ReBoc: Accelerating Block-Circulant Neural Networks in ReRAM. In: Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020. 2020. p. 1472–7.
• Zhang S, Li B, Li HH, Schlichtmann U. A Pulse-width Modulation Neuron with Continuous Activation for Processing-In-Memory Engines. In: Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020. 2020. p. 1426–31.
• Song L, Chen F, Zhuo Y, Qian X, Li H, Chen Y. AccPar: Tensor partitioning for heterogeneous deep learning accelerators. In: Proceedings - 2020 IEEE International Symposium on High Performance Computer Architecture, HPCA 2020. 2020. p. 342–55.
• Li B, Doppa JR, Pande PP, Chakrabarty K, Qiu JX, Li HH. 3D-ReG: A 3D ReRAM-based Heterogeneous Architecture for Training Deep Neural Networks. ACM Journal on Emerging Technologies in Computing Systems. 2020 Jan 29;16(2).
• Zhang T, Cheng HP, Li Z, Yan F, Huang C, Li H, et al. AutoShrink: A topology-aware NAS for discovering efficient neural architecture. In: AAAI 2020 - 34th AAAI Conference on Artificial Intelligence. 2020. p. 6829–36.
• Taylor B, Li Z, Yan B, Li H, Chen Y. Highly efficient neuromorphic computing systems with emerging nonvolatile memories. In: Proceedings of SPIE - The International Society for Optical Engineering. 2020.
• Yang C, Li H, Chen Y, Hu J. Enhancing Generalization of Wafer Defect Detection by Data Discrepancy-aware Preprocessing and Contrast-varied Augmentation. In: Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. 2020. p. 145–50.
• Chen F, Song L, Li HH, Chen Y. PARC: A Processing-in-CAM Architecture for Genomic Long Read Pairwise Alignment using ReRAM. In: Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. 2020. p. 175–80.
• Song L, Chen F, Chen Y, Li HH. Parallelism in Deep Learning Accelerators. In: Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. 2020. p. 645–50.
• Li S, Hanson E, Li H, Chen Y. PENNI: Pruned kernel sharing for efficient cnn inference. In: 37th International Conference on Machine Learning, ICML 2020. 2020. p. 5819–29.
• Zhang J, Yang H, Chen F, Wang Y, Li H. Exploring Bit-Slice Sparsity in Deep Neural Networks for Efficient ReRAM-Based Deployment. In: Proceedings - 5th Workshop on Energy Efficient Machine Learning and Cognitive Computing, EMC2-NIPS 2019. 2019. p. 1–5.
• Li B, Mao M, Liu X, Liu T, Liu Z, Wen W, et al. Thread batching for high-performance energy-efficient GPU memory design. ACM Journal on Emerging Technologies in Computing Systems. 2019 Dec 1;15(4).
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• Li H, Chen Y, Jamshidi S. Design for Low Power. In: The Computer Engineering Handbook, Second Edition - 2 Volume Set. CRC Press; 2008.
• Chen Y, Wang X, Li H, Liu H, Dimitrov DV. Design margin exploration of spin-torque transfer RAM (SPRAM). In: ISQED 2008: PROCEEDINGS OF THE NINTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN. IEEE COMPUTER SOC; 2008. p. 684–90.
• Wang X, Chen Y, Li H, Dimitrov D, Liu H. Spin torque random access memory down to 22 nm technology. IEEE Transactions on Magnetics. 2008 Jan 1;44(11 PART 2):2479–82.
• Chen Y, Li H, Li J, Koh CK. Variable-latency adder (VL-adder): New arithmetic circuit design practice to overcome NBTI. In: Proceedings of the International Symposium on Low Power Electronics and Design. 2007. p. 195–200.
• Wong WF, Kon CK, Chen Y, Li H. VOSCH: Voltage scaled cache hierarchies. In: 2007 IEEE International Conference on Computer Design, ICCD 2007. 2007. p. 496–503.
• Li H, Chen Y, Roy K, Koh CK. SAVS: A self-adaptive variable supply-voltage technique for process- Tolerant and power-efficient multi-issue superscalar processor design. In: Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. 2006. p. 158–63.
• Chen Y, Li H, Roy K, Koh CK. Cascaded carry-select adder (C² SA): A new structure for low-power CSA design. In: Proceedings of the International Symposium on Low Power Electronics and Design. 2005. p. 115–8.
• Li H, Cher CY, Roy K, Vijaykumar TN. Combined circuit and architectural level variable supply-voltage scaling for low power. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2005 May 1;13(5):564–75.
• Chen Y, Li H, Roy K, Koh CK. Gated Decap: Gate leakage control of on-chip decoupling capacitors in scaled technologies. In: Proceedings of the Custom Integrated Circuits Conference. 2005. p. 775–8.
• Chen YR, Li H, Roy K, Koh CK. Gated decap: Gate leakage control of on-chip decoupling capacitors in scaled technologies. In: CICC: PROCEEDINGS OF THE IEEE 2005 CUSTOM INTEGRATED CIRCUITS CONFERENCE. IEEE; 2005. p. 775–8.
• Li H, Bhunia S, Chen Y, Roy K, Vijaykumar TN. DCG: Deterministic Clock-Gating for Low-Power Microprocessor Design. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2004 Mar 1;12(3):245–54.
• Agarwal A, Li H, Roy K. A single-Vt low-leakage gated-ground cache for deep submicron. IEEE Journal of Solid-State Circuits. 2003 Feb 1;38(2):319–28.
• Li H, Cher CY, Vijaykumar TN, Roy K. VSV: L2-miss-driven variable supply-voltage scaling for low power. In: Proceedings of the Annual International Symposium on Microarchitecture, MICRO. 2003. p. 19–28.
• Li H, Bhunia S, Chen Y, Vijaykumar TN, Roy K. Deterministic clock gating for microprocessor power reduction. In: Proceedings - International Symposium on High-Performance Computer Architecture. 2003. p. 113–22.
• Bhunia S, Li H, Roy K. A high performance IDDQ testable cache for scaled CMOS technologies. In: Proceedings of the Asian Test Symposium. 2002. p. 157–62.
• Agarwal A, Li H, Roy K. DRG-Cache: A data retention gated-ground cache for low power. In: Proceedings - Design Automation Conference. 2002. p. 473–8.

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